Branch Behavior of Java Runtime Systems and its Microarchitectural Implications

Java programs are becoming increasingly prevalent on numerous platforms ranging from embedded systems to high-end servers. Dynamic translation (interpretation and compilation), frequent calls to native interface libraries or operating system kernel services and abundant usage of virtual methods by Java programs can complicate the intrinsic predictability of the control flows that can be exploited by an ILP machine. An in-depth look and understanding of the implications on the underlying microarchitecture can either guide architects to design efficient Java processors or finely tune the performance of a Java run time system on general purpose, wide issue machines. To our knowledge, this paper presents the first insight on branch behavior of a standard JVM running on a commercial operating system using real workloads. Employing a complete system simulation environment, we profile and quantify the performance of branch prediction structures for both user and kernel executions. The impact of different JVM styles (JIT compiler and interpreter) on branch behavior is also studied. We find that: (1) kernel instructions and kernel branches play an important role in the execution of a Java program; (2) the studied JVM contains fairly large number of static conditional branches with an average of 38K in JIT mode and 30K in interpreter mode, as opposed to 5.5K in SPECInt95; (3) a major part of the dynamic indirect branches are multiple target (polymorphic) branches; (4) kernel and user codes in a Java run time system use the underlying speculative mechanisms in different styles. We propose a split branch predictor structure that separates branch instruction stream into kernel and user parts based on the processor’s execution mode and use an optimized and cost-effective prediction mechanism for each. Simulations using SPECjvm98 show this technique improves prediction accuracy by reducing destructive branch aliasing between kernel and user codes. Since this scheme requires the access to only one of these smaller modules (kernel or user) for a given branch instruction mode, it also results in energy savings.